Chapter 4 Quiz

1. The intel instruction set is essentially a ____ address instruction set.
   (hint: ___ is either 1, 2, or 3)

2. How many address lines are required to access 4 megabytes of data?

3. In little-endian format, the most significant byte of an integer is stored
   at decimal address 100.  Where is the least significant byte stored?

4. What is the purpose of the SS register?

5. Why should you not use the ESP register to store a temporary value?

6. What happens during the fetch phase of the fetch/execute cycle?

7. If the ax register contained the hexadecimal value ABCD, what would
   the contents of the ax register be after the following instructions:

   push ax
   pop  al
   pop  ah

8. Write a sequence of nasm-style assembly language instructions that
   will swap the contents of the eax and ebx registers without changing
   the value of other registers.

9.  What "normal" register is usually associated with the CS segment
    register?

10. Why does the interconnect relationship

    CPU <-> I/O <-> Memory

    Not make any sense?